arm64: FP SIMD arithmetic/rounding instructions #634
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mathetake
commented
Jun 18, 2022
| @@ -2899,283 +2899,260 @@ func (a *AssemblerImpl) EncodeStaticConstToVectorRegister(n *NodeImpl) (err erro | |||
| // advancedSIMDAcrossLanes holds information to encode instructions as "Advanced SIMD two-register miscellaneous" in | |||
| // https://developer.arm.com/documentation/ddi0596/2021-12/Index-by-Encoding/Data-Processing----Scalar-Floating-Point-and-Advanced-SIMD?lang=en | |||
| var advancedSIMDTwoRegisterMisc = map[asm.Instruction]struct { | |||
| U, Opcode byte | |||
| // TODO: extract common implementation of qAndSizeResolver. | |||
| qAndSizeResolver func(arrangement VectorArrangement) (Q, Size byte, err error) | |||
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I just did the refactoring again, but nothing interesting... just decided to use map instead of anonymous functions
as this was getting hairy :D
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codefromthecrypt
approved these changes
Jun 20, 2022
mathetake
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Jun 20, 2022
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
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This implements floating point SIMD arithmetics and rounding
instructions for arm64 backend.
Notably, now arm64 passes
simd_f32x4_arith.json,simd_f64x2_arith,simd_f64x2,simd_f32x4,simd_f32x4_rounding,simd_f64x2_roundingspectests.
Signed-off-by: Takeshi Yoneda takeshi@tetrate.io